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NXP Semiconductors /LPC176x5x /EMAC /COMMAND

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Interpret as COMMAND

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RXENABLE)RXENABLE 0 (TXENABLE)TXENABLE 0 (RESERVED)RESERVED 0 (REGRESET)REGRESET 0 (TXRESET)TXRESET 0 (RXRESET)RXRESET 0 (PASSRUNTFRAME)PASSRUNTFRAME 0 (PASSRXFILTER)PASSRXFILTER 0 (TXFLOWCONTROL)TXFLOWCONTROL 0 (RMII)RMII 0 (FULLDUPLEX)FULLDUPLEX 0 (RESERVED)RESERVED

Description

Command register.

Fields

RXENABLE

Enable receive.
TXENABLE

Enable transmit.
RESERVED

Unused
REGRESET

When a 1 is written, all datapaths and the host registers are reset. The MAC needs to be reset separately.
TXRESET

When a 1 is written, the transmit datapath is reset.
RXRESET

When a 1 is written, the receive datapath is reset.
PASSRUNTFRAME

When set to 1 , passes runt frames s1maller than 64 bytes to memory unless they have a CRC error. If 0 runt frames are filtered out.
PASSRXFILTER

When set to 1 , disables receive filtering i.e. all frames received are written to memory.
TXFLOWCONTROL

Enable IEEE 802.3 / clause 31 flow control sending pause frames in full duplex and continuous preamble in half duplex.
RMII

When set to 1 , RMII mode is selected; if 0, MII mode is selected.
FULLDUPLEX

When set to 1 , indicates full duplex operation.
RESERVED

Unused

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data